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HBUS UVC cs348 unit9

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    In the next exercise, we will pull all the different components together to
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    build our HBUS UVC, so lets have a quick look at the structure. We will have a
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    single master agent and we've already worked on the monitor, sequencer, and
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    driver. The second map will be outside of the agent, because it's shared
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    between masters and slaves. We will not work on this slave agents much because
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    we don't need it for this version of the router. Here are the details for the
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    agent file. I want you to do define the master agent with some specific fields.
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    Again, the active the component has these sequence on the driver. And again,
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    make sure that pointer in the driver which points to the sequencer is connected
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    in the correct phase. Add your definition here. Down here, you can see the
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    slave, so don't worry about the slave, we only have the name field, we are not
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    using slave in this exercise. Here are the guidelines for the top level
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    container of the hbus_uvc, so you need to call it hbusenvu and it should have
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    the fields as outlined here. So, we will have one master and a list of slaves.
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    The master, slave, and the signal map. They all have a filed called env_name.
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    It's a hbusenvname type. This field should get the value from the name field
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    of the env. So, use constraints to push those down. Finally, the monitor driver
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    and sequence will have a pointer to the signal map. So, it's a pointer which
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    looks like this. So, make sure that in the right phase you connect the signal
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    map of the env to this pointer in this sub components.
Title:
HBUS UVC cs348 unit9
Team:
Udacity
Project:
CS348 - Functional Hardware Verification
Duration:
01:37

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