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Computers used to be as big as a room.
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But now they fit in your pocket,
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on your wrist
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and can even be implanted
inside of your body.
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How cool is that?
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And this has been enabled
by the miniaturization of transistors,
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which are the tiny switches
in the circuits
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at the heart of our computers.
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And it's been achieved
through decades of development
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and breakthroughs
in science and engineering
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and of billions of dollars of investment.
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But it's given us
vast amounts of computing,
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huge amounts of memory
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and the digital revolution
that we all experience and enjoy today.
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But the bad news is,
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we're about to hit a digital roadblock,
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as the rate of miniaturization
of transistors is slowing down.
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And this is happening
at exactly the same time
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as our innovation in software
is continuing relentlessly
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with artificial intelligence and big data.
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And our devices regularly perform
facial recognition or augment our reality
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or even drive cars down
our treacherous, chaotic roads.
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It's amazing.
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But if we don't keep up
with the appetite of our software,
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we could reach a point
in the development of our technology
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where the things that we could do
with software could, in fact, be limited
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by our hardware.
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We've all experienced the frustration
of an old smartphone or tablet
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grinding slowly to a halt over time
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under the ever-increasing weight
of software updates and new features.
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And it worked just fine
when we bought it not so long ago.
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But the hungry software engineers
have eaten up all the hardware capacity
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over time.
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The semiconductor industry
is very well aware of this
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and is working on
all sorts of creative solutions,
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such as going beyond transistors
to quantum computing
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or even working with transistors
in alternative architectures
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such as neural networks
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to make more robust
and efficient circuits.
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But these approaches
will take quite some time,
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and we're really looking for a much more
immediate solution to this problem.
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The reason why the rate of miniaturization
of transistors is slowing down
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is due to the ever-increasing complexity
of the manufacturing process.
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The transistor used to be
a big, bulky device,
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until the invent of the integrated circuit
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based on pure crystalline silicon wafers.
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And after 50 years
of continuous development,
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we can now achieve
transistor features dimensions
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down to 10 nanometers.
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You can fit more than
a billion transistors
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in a single square millimeter of silicon.
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And to put this into perspective:
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a human hair is 100 microns across.
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A red blood cell,
which is essentially invisible,
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is eight microns across,
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and you can place 12 across
the width of a human hair.
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But a transistor, in comparison,
is much smaller,
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at a tiny fraction of a micron across.
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You could place more than 260 transistors
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across a single red blood cell
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or more than 3,000 across
the width of a human hair.
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It really is incredible nanotechnology
in your pocket right now.
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And besides the obvious benefit
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of being able to place more,
smaller transistors on a chip,
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smaller transistors are faster switches,
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and smaller transistors are also
more efficient switches.
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So this combination has given us
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lower cost, higher performance
and higher efficiency electronics
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that we all enjoy today.
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To manufacture these integrated circuits,
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the transistors are built up
layer by layer,
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on a pure crystalline silicon wafer.
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And in an oversimplified sense,
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every tiny feature
of the circuit is projected
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onto the surface of the silicon wafer
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and recorded in a light-sensitive material
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and then etched through
the light-sensitive material
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to leave the pattern
in the underlying layers.
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And this process has been
dramatically improved over the years
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to give the electronics
performance we have today.
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But as the transistor features
get smaller and smaller,
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we're really approaching
the physical limitations
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of this manufacturing technique.
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The latest systems
for doing this patterning
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have become so complex
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that they reportedly cost
more than 100 million dollars each.
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And semiconductor factories
contain dozens of these machines.
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So people are seriously questioning:
Is this approach long-term viable?
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But we believe we can do
this chip manufacturing
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in a totally different
and much more cost-effective way
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using molecular engineering
and mimicking nature
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down at the nanoscale dimensions
of our transistors.
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As I said, the conventional manufacturing
takes every tiny feature of the circuit
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and projects it onto the silicon.
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But if you look at the structure
of an integrated circuit,
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the transistor arrays,
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many of the features are repeated
millions of times.
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It's a highly periodic structure.
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So we want to take advantage
of this periodicity
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in our alternative
manufacturing technique.
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We want to use self-assembling materials
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to naturally form the periodic structures
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that we need for our transistors.
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We do this with the materials,
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then the materials do the hard work
of the fine patterning,
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rather than pushing the projection
technology to its limits and beyond.
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Self-assembly is seen in nature
in many different places,
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from lipid membranes to cell structures,
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so we do know it can be a robust solution.
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If it's good enough for nature,
it should be good enough for us.
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So we want to take this naturally
occurring, robust self-assembly
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and use it for the manufacturing
of our semiconductor technology.
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One type of self-assemble material --
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it's called a block co-polymer --
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consists of two polymer chains
just a few tens of nanometers in length.
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But these chains hate each other.
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They repel each other,
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very much like oil and water
or my teenage son and daughter.
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(Laughter)
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But we cruelly bond them together,
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creating an inbuilt
frustration in the system,
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as they try to separate from each other.
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And in the bulk material,
there are billions of these,
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and the similar components
try to stick together,
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and the opposing components
try to separate from each other
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at the same time.
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And this has a built-in frustration,
a tension in the system,
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so it moves around, it squirms
until a shape is formed.
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And the natural self-assembled shape
that is formed is nanoscale,
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it's regular, it's periodic,
and it's long range,
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which is exactly what we need
for our transistor arrays.
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So we can use molecular engineering
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to design different shapes
of different sizes
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and of different periodicities.
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So for example, if we take
a symmetrical molecule,
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where the two polymer chains
are similar length,
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the natural self-assembled
structure that is formed
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is a long, meandering line,
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very much like a fingerprint.
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And the width of the fingerprint lines
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and the distance between them
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is determined by the lengths
of our polymer chains
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but also the level of built-in
frustration in the system.
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And we can even create
more elaborate structures
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if we use unsymmetrical molecules,
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where one polymer chain
is significantly shorter than the other.
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And the self-assembled structure
that forms in this case
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is with the shorter chains
forming a tight ball in the middle,
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and it's surrounded by the longer,
opposing polymer chains,
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forming a natural cylinder.
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And the size of this cylinder
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and the distance between
the cylinders, the periodicity,
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is again determined by how long
we make the polymer chains
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and the level of built-in frustration.
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So in other words, we're using
molecular engineering
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to self-assemble nanoscale structures
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that can be lines or cylinders
the size and periodicity of our design.
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We're using chemistry,
chemical engineering,
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to manufacture the nanoscale features
that we need for our transistors.
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But the ability
to self-assemble these structures
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only takes us half of the way,
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because we still need
to position these structures
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where we want the transistors
in the integrated circuit.
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But we can do this relatively easily
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using wide guide structures that pin down
the self-assembled structures,
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anchoring them in place
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and forcing the rest
of the self-assembled structures
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to lie parallel,
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aligned with our guide structure.
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For example, if we want to make
a fine, 40-nanometer line,
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which is very difficult to manufacture
with conventional projection technology,
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we can manufacture
a 120-nanometer guide structure
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with normal projection technology,
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and this structure will align three
of the 40-nanometer lines in between.
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So the materials are doing
the most difficult fine patterning.
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And we call this whole approach
"directed self-assembly."
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The challenge with directed self-assembly
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is that the whole system
needs to align almost perfectly,
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because any tiny defect in the structure
could cause a transistor failure.
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And because there are billions
of transistors in our circuit,
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we need an almost
molecularly perfect system.
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But we're going to extraordinary measures
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to achieve this,
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from the cleanliness of our chemistry
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to the careful processing
of these materials
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in the semiconductor factory
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to remove even the smallest
nanoscopic defects.
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So directed self-assembly
is an exciting new disruptive technology,
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but it is still in the development stage.
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But we're growing in confidence
that we could, in fact, introduce it
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to the semiconductor industry
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as a revolutionary new
manufacturing process
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in just the next few years.
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And if we can do this,
if we're successful,
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we'll be able to continue
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with the cost-effective
miniaturization of transistors,
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continue with the spectacular
expansion of computing
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and the digital revolution,
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and what's more, this could even
be the dawn of a new era
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of molecular manufacturing.
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How cool is that?
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Thank you.
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(Applause)