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Title: 
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Format: Layer, Start, End, Style, Name, MarginL, MarginR, MarginV, Effect, Text
Dialogue: 0,0:00:00.00,0:00:18.51,Default,,0000,0000,0000,,{\i1}35c3 pre-roll music{\i0}
Dialogue: 0,0:00:18.51,0:00:25.79,Default,,0000,0000,0000,,Herald: The next talk is the talk on\NLibreSilicon project that's meant to
Dialogue: 0,0:00:25.79,0:00:31.06,Default,,0000,0000,0000,,create a free and open silicon\Nmanufacturing process. And our speakers
Dialogue: 0,0:00:31.06,0:00:37.22,Default,,0000,0000,0000,,today are leviathan, chipforge and\NAndreas Westerwick, creators of
Dialogue: 0,0:00:37.22,0:00:44.60,Default,,0000,0000,0000,,LibreSilicon. So let's give them a firm\Nround of applause and please welcome them.
Dialogue: 0,0:00:44.60,0:00:50.00,Default,,0000,0000,0000,,{\i1}applause{\i0}
Dialogue: 0,0:00:50.00,0:01:00.08,Default,,0000,0000,0000,,David: Oh, it works, ok. That's problem.\NThat's what essentially is all this fuss
Dialogue: 0,0:01:00.08,0:01:09.49,Default,,0000,0000,0000,,about is actually a description of how\Nwe... what this waver means and where we
Dialogue: 0,0:01:09.49,0:01:19.95,Default,,0000,0000,0000,,will go with it. And yeah, I give now\Nalready over to Hagen which already starts
Dialogue: 0,0:01:19.95,0:01:28.50,Default,,0000,0000,0000,,elaborating on the basic conceptional\Nthings.
Dialogue: 0,0:01:28.50,0:01:39.54,Default,,0000,0000,0000,,Hagen: OK. Hello everybody. Hope you have\Na fresh mind. It could be heavy. OK. Let's
Dialogue: 0,0:01:39.54,0:01:53.48,Default,,0000,0000,0000,,start. What we are. Last year David was\Ninvolved at the project to looking for
Dialogue: 0,0:01:53.48,0:01:59.72,Default,,0000,0000,0000,,free silicon, just a way to manufacture\Nhis own chips and figured out it's
Dialogue: 0,0:01:59.72,0:02:05.62,Default,,0000,0000,0000,,difficult. You need a lot of contracts for\Nthat, NDAs (non-disclosure agreements). So
Dialogue: 0,0:02:05.62,0:02:10.09,Default,,0000,0000,0000,,he looked around and find a clean room. We\Nhad to come in and say, OK, we can rent
Dialogue: 0,0:02:10.09,0:02:17.01,Default,,0000,0000,0000,,it. Then he entered a scene on the last\NCongress - a lightning talk - and said, I
Dialogue: 0,0:02:17.01,0:02:24.51,Default,,0000,0000,0000,,like to do that. And I wasn't in the\Nauditorium there, but a guy told me later,
Dialogue: 0,0:02:24.51,0:02:29.75,Default,,0000,0000,0000,,OK, look at this lightning talk. It's very\Ninteresting. You'd already doing chips. So
Dialogue: 0,0:02:29.75,0:02:37.89,Default,,0000,0000,0000,,I entered in sees it or seen the talk\Nrecording and see it. Nice idea, I will do
Dialogue: 0,0:02:37.89,0:02:49.32,Default,,0000,0000,0000,,that too. And the whole year we meet us by\Nmumble. It's just a thing of distance you
Dialogue: 0,0:02:49.32,0:02:56.97,Default,,0000,0000,0000,,know. David is located in Hong Kong. The\Nclean room is there. And I worked from
Dialogue: 0,0:02:56.97,0:03:05.56,Default,,0000,0000,0000,,Germany. So we exchanged e-mails. We\Ntalked on a mailing list. We built up a
Dialogue: 0,0:03:05.56,0:03:14.00,Default,,0000,0000,0000,,small community for that and we had a\Nfirst hackathon just to figure it out,
Dialogue: 0,0:03:14.00,0:03:17.89,Default,,0000,0000,0000,,what we are doing with the tools, which\Ntools are available how we can use them,
Dialogue: 0,0:03:17.89,0:03:26.80,Default,,0000,0000,0000,,are they usable at all or not. And this\Nwas in May and during the process the
Dialogue: 0,0:03:26.80,0:03:34.43,Default,,0000,0000,0000,,group wised up and already two of us got\Ntheir qualification to enter the clean
Dialogue: 0,0:03:34.43,0:03:39.72,Default,,0000,0000,0000,,room. The Hong Kong University is a\Nlittle bit strict in that. You have to sit
Dialogue: 0,0:03:39.72,0:03:46.23,Default,,0000,0000,0000,,there in the courses, you have to do exams\Nand if you're fine with the exam then you
Dialogue: 0,0:03:46.23,0:03:51.62,Default,,0000,0000,0000,,get the permissions to go in. So Victor\Nwhich is on the most left and David on
Dialogue: 0,0:03:51.62,0:03:55.93,Default,,0000,0000,0000,,the most right, they have the\Nqualification for that and they
Dialogue: 0,0:03:55.93,0:04:03.01,Default,,0000,0000,0000,,manufacture our wafer which you have seen\Nthere. It's a small one, but it's the
Dialogue: 0,0:04:03.01,0:04:12.19,Default,,0000,0000,0000,,first stuff we have, right? OK. The basic\Npoints, what we are doing. We are using
Dialogue: 0,0:04:12.19,0:04:19.73,Default,,0000,0000,0000,,a quite, let's see, old technologies from\Nthe 80s. It's one micrometer feature size.
Dialogue: 0,0:04:19.73,0:04:26.27,Default,,0000,0000,0000,,It means a gate length of the transistor\Nhas one micron. It's not comparable with
Dialogue: 0,0:04:26.27,0:04:31.69,Default,,0000,0000,0000,,all the processors you can buy now. It's\Nquite old, it's really stuff from the 80s.
Dialogue: 0,0:04:31.69,0:04:38.35,Default,,0000,0000,0000,,But we do it in a new way. We don't use\Nthe technology from the 80s. We do it with
Dialogue: 0,0:04:38.35,0:04:45.87,Default,,0000,0000,0000,,the knowledge and all the experience from\Nnewer technology. Doing it again and using
Dialogue: 0,0:04:45.87,0:04:52.82,Default,,0000,0000,0000,,some steps which are not so common, well,\Nit wasn't common in the 80s. So why one
Dialogue: 0,0:04:52.82,0:05:02.37,Default,,0000,0000,0000,,micron? One micron also means that the\Ntransistors are very robust against five
Dialogue: 0,0:05:02.37,0:05:12.08,Default,,0000,0000,0000,,volt. Five volt was a usual supply voltage\Nin the 80s, 90s and something like that.
Dialogue: 0,0:05:12.08,0:05:19.31,Default,,0000,0000,0000,,Now the supply voltage is going down,\Ndown to less than one volt but for
Dialogue: 0,0:05:19.31,0:05:27.63,Default,,0000,0000,0000,,tinkerers, for hobbyists, for makers, it's\Na nice value because older stuff, many
Dialogue: 0,0:05:27.63,0:05:36.09,Default,,0000,0000,0000,,boards are still working with five volts\Nand we're able to handle this voltage. So
Dialogue: 0,0:05:36.09,0:05:44.00,Default,,0000,0000,0000,,we have a twin-well process; usually in\Nthe 80s there was just one well. OK, we
Dialogue: 0,0:05:44.00,0:05:50.42,Default,,0000,0000,0000,,have to hurry up. We have three metal\Nlayers. We have interesting additions and
Dialogue: 0,0:05:50.42,0:05:57.00,Default,,0000,0000,0000,,we are suitable for low tech. Ghetto tech,\NI would say. You can use it without
Dialogue: 0,0:05:57.00,0:06:03.41,Default,,0000,0000,0000,,sophisticated equipment. We can analog\Nstuff and so on and analog stuff means you
Dialogue: 0,0:06:03.41,0:06:11.51,Default,,0000,0000,0000,,don't need small structures. OK. Areas\Nwhere we have to work on. First, the
Dialogue: 0,0:06:11.51,0:06:18.83,Default,,0000,0000,0000,,process. It's almost done. You have\Nfigured out it works with measuring. OK,
Dialogue: 0,0:06:18.83,0:06:24.37,Default,,0000,0000,0000,,the next stuff: we need the tools. But the\Ntools are also very old and mostly not
Dialogue: 0,0:06:24.37,0:06:30.55,Default,,0000,0000,0000,,usable. We have to deal with that stuff.\NWe have to rethink the tooling for that
Dialogue: 0,0:06:30.55,0:06:38.33,Default,,0000,0000,0000,,and we need standard cells. That's my\Ntask. OK, so a couple of thoughts about
Dialogue: 0,0:06:38.33,0:06:45.33,Default,,0000,0000,0000,,standard cells. They are very common.\NUsually, if you have a need to translate
Dialogue: 0,0:06:45.33,0:06:54.63,Default,,0000,0000,0000,,your Verilog or VHDL and to bring it on a\Nsilicon you need small gates. NAND gates,
Dialogue: 0,0:06:54.63,0:07:04.73,Default,,0000,0000,0000,,OR gates and so on. But these gates need a\Nlot of representation, the combinatorial
Dialogue: 0,0:07:04.73,0:07:08.68,Default,,0000,0000,0000,,sequencing. So OK. These are typical\Ncells. Just a couple of them. But imagine,
Dialogue: 0,0:07:08.68,0:07:16.24,Default,,0000,0000,0000,,we need much much more and there's design\Ngoals for the standard cells as we need
Dialogue: 0,0:07:16.24,0:07:24.08,Default,,0000,0000,0000,,almost complete possibilities. If you have\Njust this small selection of cells, the
Dialogue: 0,0:07:24.08,0:07:33.04,Default,,0000,0000,0000,,netlist becomes huge and every gate in the\Nnetlist also means a dedicated delay. If
Dialogue: 0,0:07:33.04,0:07:39.23,Default,,0000,0000,0000,,you have long chains we have a long delay\Nso that our operating frequency goes down.
Dialogue: 0,0:07:39.23,0:07:46.03,Default,,0000,0000,0000,,So if you have more complex gates we are\Nbetter but doing all this stuff is heavy,
Dialogue: 0,0:07:46.03,0:07:54.53,Default,,0000,0000,0000,,but we like to be lower power. That means\Nour cells have to be consumption less
Dialogue: 0,0:07:54.53,0:08:00.61,Default,,0000,0000,0000,,power than usual. We want to be fast but\Nyes, of course, it doesn't fit all
Dialogue: 0,0:08:00.61,0:08:07.46,Default,,0000,0000,0000,,together. OK. So we need it for\Nsimulation. We need it for synthesis. We
Dialogue: 0,0:08:07.46,0:08:15.47,Default,,0000,0000,0000,,need it for timing. As you can see\Neverywhere on the slides and, of course,
Dialogue: 0,0:08:15.47,0:08:22.14,Default,,0000,0000,0000,,documentation. That's a lot of work. We\Nare a small team. I am the only guy who is
Dialogue: 0,0:08:22.14,0:08:26.27,Default,,0000,0000,0000,,dealing with the standard cells it's\Nusually our teams also are doing that. So
Dialogue: 0,0:08:26.27,0:08:33.75,Default,,0000,0000,0000,,OK, we need a tool for that which does all\Nthe stuff for us. And this cell generator,
Dialogue: 0,0:08:33.75,0:08:42.36,Default,,0000,0000,0000,,I called it popcorn, because I put in some\Ncorn and it rised up with the heat. So we
Dialogue: 0,0:08:42.36,0:08:54.31,Default,,0000,0000,0000,,can get all the representation. So\Ncurrently I have this tool on the
Dialogue: 0,0:08:54.31,0:09:01.88,Default,,0000,0000,0000,,repository which is Tcl which does some\Nstuff I like, I need, but not all. But it
Dialogue: 0,0:09:01.88,0:09:07.65,Default,,0000,0000,0000,,already seems very ugly. So for me I like\Nto rewrite that but I don't figure out
Dialogue: 0,0:09:07.65,0:09:12.60,Default,,0000,0000,0000,,currently which language I like to use for\Nthat. Next time it could be rust, it could
Dialogue: 0,0:09:12.60,0:09:18.14,Default,,0000,0000,0000,,be scheme or something like that. We need\Nanother language for that. So if someone
Dialogue: 0,0:09:18.14,0:09:23.39,Default,,0000,0000,0000,,would help - please, but that's the next\Ntask, if you have the wafer done
Dialogue: 0,0:09:23.39,0:09:31.12,Default,,0000,0000,0000,,completely and measured. OK. That's a link\Nfor the repository where you can look at
Dialogue: 0,0:09:31.12,0:09:37.26,Default,,0000,0000,0000,,the current status and there's a wiki\Nwhere I like to describe why I'm doing
Dialogue: 0,0:09:37.26,0:09:45.58,Default,,0000,0000,0000,,what in which way. But yes, we have to do\Na lot more. OK.
Dialogue: 0,0:09:45.58,0:09:54.82,Default,,0000,0000,0000,,Andreas: OK. Hi. I take a look at the\Ncurrent tooling that exists like
Dialogue: 0,0:09:54.82,0:10:02.16,Default,,0000,0000,0000,,layouting, place and route to minimize the\Nyield on the wafer. And obviously because
Dialogue: 0,0:10:02.16,0:10:08.92,Default,,0000,0000,0000,,this is the LibreSilicon project we look\Nat open source tools. So we have Yosys and
Dialogue: 0,0:10:08.92,0:10:16.76,Default,,0000,0000,0000,,graywolf, qrouter and several other FPGA\Nrouters that exist. Yosys is pretty good.
Dialogue: 0,0:10:16.76,0:10:23.79,Default,,0000,0000,0000,,We can probably use this for the\Nsynthesis. But the other tools, they lack
Dialogue: 0,0:10:23.79,0:10:31.45,Default,,0000,0000,0000,,very critical qualities for this... for\Nsilicon because they, for example, they
Dialogue: 0,0:10:31.45,0:10:40.63,Default,,0000,0000,0000,,are part of qflow which is an FPGA\Nworkflow. So the graywolf tool, it
Dialogue: 0,0:10:40.63,0:10:49.81,Default,,0000,0000,0000,,originates in academia. It's, like, it's\Nmany decades old. It comes with some very
Dialogue: 0,0:10:49.81,0:10:55.21,Default,,0000,0000,0000,,good ideas, for example simulated\Nannealing which is a meta-heuristic
Dialogue: 0,0:10:55.21,0:11:01.74,Default,,0000,0000,0000,,you can use to solve NP-hard problems, but\Nit's only one of the many choices you can
Dialogue: 0,0:11:01.74,0:11:10.63,Default,,0000,0000,0000,,make to solve the extra hard problems. But\Nit also comes with bad implementation, for
Dialogue: 0,0:11:10.63,0:11:17.22,Default,,0000,0000,0000,,example inline syscalls is a very bad\Nidea. And it's also written in C and blah
Dialogue: 0,0:11:17.22,0:11:24.95,Default,,0000,0000,0000,,blah, OK. Qrouter is actually... it's\Npretty good. It started in 2011 by Tim
Dialogue: 0,0:11:24.95,0:11:33.81,Default,,0000,0000,0000,,Edwards. It's widely used for, by hobbyists\Nand enthusiasts to route for FPGAs. But
Dialogue: 0,0:11:33.81,0:11:37.89,Default,,0000,0000,0000,,it's not ready for silicon and it's\Nespecially not ready for our LibreSilicon
Dialogue: 0,0:11:37.89,0:11:49.25,Default,,0000,0000,0000,,process which would require us to to write\Na lot of C code for Qrouter. Also
Dialogue: 0,0:11:49.25,0:11:56.03,Default,,0000,0000,0000,,parallelism apparently is not in scope, so\NI mean if we want to scale up, for example
Dialogue: 0,0:11:56.03,0:12:04.34,Default,,0000,0000,0000,,place and route in the cloud or whatever or\Nuse modern CPU architectures, we are stuck
Dialogue: 0,0:12:04.34,0:12:11.69,Default,,0000,0000,0000,,with sequential routing which is pretty\Nbad. Also it lacks a very important
Dialogue: 0,0:12:11.69,0:12:18.31,Default,,0000,0000,0000,,aspect, in my opinion, which is formal\Ncorrectness. So when we produce wafers in
Dialogue: 0,0:12:18.31,0:12:25.48,Default,,0000,0000,0000,,the fab we want to make sure that they\Ndon't blow up in our faces. This is why we
Dialogue: 0,0:12:25.48,0:12:31.35,Default,,0000,0000,0000,,need some form of proof that our\Nalgorithms are correct and therefore the
Dialogue: 0,0:12:31.35,0:12:41.31,Default,,0000,0000,0000,,result is correct. There are also other\Nproductive tools that are proprietary
Dialogue: 0,0:12:41.31,0:12:45.22,Default,,0000,0000,0000,,where we can look at, but we cannot use it\Nor fork it or whatever but we can learn
Dialogue: 0,0:12:45.22,0:12:52.29,Default,,0000,0000,0000,,from the research that has been done, for\Nexample BonnRoute. BonnRoute is used by
Dialogue: 0,0:12:52.29,0:13:01.33,Default,,0000,0000,0000,,IBM. The Cadence suite, I believe, is used\Nby Intel and the Alliance tools is French
Dialogue: 0,0:13:01.33,0:13:08.34,Default,,0000,0000,0000,,academia. Very UNIXy, I mean it's a very\Nit's a very large set of small tools that
Dialogue: 0,0:13:08.34,0:13:12.64,Default,,0000,0000,0000,,convert different file formats to another.\NI mean, maybe you encountered this problem
Dialogue: 0,0:13:12.64,0:13:17.68,Default,,0000,0000,0000,,before when you did some hardware design;\Nyou have many different file formats that
Dialogue: 0,0:13:17.68,0:13:24.78,Default,,0000,0000,0000,,all don't play together very well. So you\Nhave tools like X to Y which convert file
Dialogue: 0,0:13:24.78,0:13:33.39,Default,,0000,0000,0000,,format x to y. And you see when you want\Nto place and route and layout a very very
Dialogue: 0,0:13:33.39,0:13:39.84,Default,,0000,0000,0000,,large chip, like a Very Large Silicon\NIntegration, then this isn't even done,
Dialogue: 0,0:13:39.84,0:13:45.45,Default,,0000,0000,0000,,like, automatically by tools. This is done\Nwith manpower. When you look at a very
Dialogue: 0,0:13:45.45,0:13:54.03,Default,,0000,0000,0000,,large chip done by Intel or IBM. So this\Nis an example of a very very large chip as
Dialogue: 0,0:13:54.03,0:14:02.77,Default,,0000,0000,0000,,you can see. I mean do you think this has\Nbeen done by automation like industry 5.0?
Dialogue: 0,0:14:02.77,0:14:08.94,Default,,0000,0000,0000,,No. This is all manpower and a lot\Nof manpower. Which we don't have, The
Dialogue: 0,0:14:08.94,0:14:17.18,Default,,0000,0000,0000,,LibreSilicon project at the moment. So\Nthis is the state of the art is like
Dialogue: 0,0:14:17.18,0:14:25.08,Default,,0000,0000,0000,,okay the manpower thing is one aspect but\Nthe other thing is so what you do is
Dialogue: 0,0:14:25.08,0:14:36.36,Default,,0000,0000,0000,,you do placing and routing at different\Nsteps at the design process so you do
Dialogue: 0,0:14:36.36,0:14:44.83,Default,,0000,0000,0000,,placing for a very large chip, floor\Nplanning and then you do a global routing
Dialogue: 0,0:14:44.83,0:14:51.73,Default,,0000,0000,0000,,which is you /can imagine it like\Nrouting along a rough chessboard. And
Dialogue: 0,0:14:51.73,0:14:55.66,Default,,0000,0000,0000,,after that you do a very detailed\Nrouting where all the different
Dialogue: 0,0:14:55.66,0:15:03.73,Default,,0000,0000,0000,,constraints regarding your technology come\Ninto play and so again the formal
Dialogue: 0,0:15:03.73,0:15:09.92,Default,,0000,0000,0000,,correctness aspect. So you have some\Nimperative algorithm that you cannot prove
Dialogue: 0,0:15:09.92,0:15:16.10,Default,,0000,0000,0000,,will blow up. And it's also not a very\Nparallel code. So you're still stuck with
Dialogue: 0,0:15:16.10,0:15:28.81,Default,,0000,0000,0000,,the sequential nature of the code and you\Nhave no parallelism. What we propose is to
Dialogue: 0,0:15:28.81,0:15:35.15,Default,,0000,0000,0000,,not place and route for large chip but\Nto decompose the large chip into much
Dialogue: 0,0:15:35.15,0:15:42.78,Default,,0000,0000,0000,,smaller units like a component hierarchy\Nor a sub cell hierarchy and then place and
Dialogue: 0,0:15:42.78,0:15:50.55,Default,,0000,0000,0000,,route the small chips at the same time and\Nthen reuse the small units in larger
Dialogue: 0,0:15:50.55,0:15:57.54,Default,,0000,0000,0000,,units. So you get an evaluation tree you\Ncan work on and compile just the
Dialogue: 0,0:15:57.54,0:16:09.68,Default,,0000,0000,0000,,components you need. Also we propose\Nsatisfiability modulo theory solvers so we
Dialogue: 0,0:16:09.68,0:16:17.85,Default,,0000,0000,0000,,can have some first order logic where we\Ncan have constraints on the components,
Dialogue: 0,0:16:17.85,0:16:24.09,Default,,0000,0000,0000,,how they are placed for example they\Ndon't - they must not overlap.
Dialogue: 0,0:16:24.09,0:16:32.68,Default,,0000,0000,0000,,Let's take the most simple example I will\Nshow you like later. And also we want to
Dialogue: 0,0:16:32.68,0:16:44.11,Default,,0000,0000,0000,,achieve parallel or declarative code. So\Nas you can see we have some, we have many
Dialogue: 0,0:16:44.11,0:16:50.63,Default,,0000,0000,0000,,disagreements with academia and industry\Nwhich work very well together for example
Dialogue: 0,0:16:50.63,0:16:56.42,Default,,0000,0000,0000,,when you want to study semiconductor\Ndesign you have to sign some NDAs with IBM
Dialogue: 0,0:16:56.42,0:17:05.70,Default,,0000,0000,0000,,or Intel to do that. So, they say\Nplacement and routing or floor planning
Dialogue: 0,0:17:05.70,0:17:11.01,Default,,0000,0000,0000,,and routing are different problems and\Nthey need to be solved at different times
Dialogue: 0,0:17:11.01,0:17:18.59,Default,,0000,0000,0000,,in the process. And then all the\Ncomponents can be registers or NAND gates
Dialogue: 0,0:17:18.59,0:17:23.15,Default,,0000,0000,0000,,it does matter they all treated the same.\NNo it only matters that uh the floor
Dialogue: 0,0:17:23.15,0:17:27.08,Default,,0000,0000,0000,,planning stand first and then the routing\Nthe closed routing then a detailed
Dialogue: 0,0:17:27.08,0:17:34.92,Default,,0000,0000,0000,,routing. What we propose is that place\Nand route is actually the same problem and
Dialogue: 0,0:17:34.92,0:17:45.35,Default,,0000,0000,0000,,that registers are different from full\Nadders. Okay. So the geographical
Dialogue: 0,0:17:45.35,0:17:53.72,Default,,0000,0000,0000,,partitioning of a wafer is called floor\Nplanning or the placing step. And this
Dialogue: 0,0:17:53.72,0:18:00.91,Default,,0000,0000,0000,,results in a cut tree. So this is how they\Ndo routing hierarchies. They just divide
Dialogue: 0,0:18:00.91,0:18:08.67,Default,,0000,0000,0000,,the wafer into smaller pieces and then do\Nthe following steps based on this
Dialogue: 0,0:18:08.67,0:18:16.25,Default,,0000,0000,0000,,placement. What we want to do is have\Nsubcell hierarchies and those sub cells
Dialogue: 0,0:18:16.25,0:18:23.23,Default,,0000,0000,0000,,they are either explicit like they are\Nexplicitly developed for example the
Dialogue: 0,0:18:23.23,0:18:32.56,Default,,0000,0000,0000,,rocket ship is very modular and it has\Nmany explicit verilog modules you can use
Dialogue: 0,0:18:32.56,0:18:39.70,Default,,0000,0000,0000,,and place and route that and then reuse\Nit. And it also has implicit sub cells like
Dialogue: 0,0:18:39.70,0:18:45.78,Default,,0000,0000,0000,,for example most of the time. For example\Nyou have a full adder it obviously is
Dialogue: 0,0:18:45.78,0:18:52.19,Default,,0000,0000,0000,,composed of one bit adders so you can\Nplace and route one bit adder and then
Dialogue: 0,0:18:52.19,0:18:56.84,Default,,0000,0000,0000,,place and route based on the one bit\Nadders that you artfully placed and routed.
Dialogue: 0,0:18:56.84,0:19:00.76,Default,,0000,0000,0000,,And as a result you get a full adder.\NThat's just one example but I will show
Dialogue: 0,0:19:00.76,0:19:11.37,Default,,0000,0000,0000,,you a tree, a few slides. So there you see\Nparallelism. There's something very
Dialogue: 0,0:19:11.37,0:19:19.99,Default,,0000,0000,0000,,important for us. BonnRoute allocates a\Nlot of research to have some mathematical
Dialogue: 0,0:19:19.99,0:19:27.76,Default,,0000,0000,0000,,model for concurrency and shared memory\Nmodels. qrouter, which is the open source
Dialogue: 0,0:19:27.76,0:19:34.67,Default,,0000,0000,0000,,alternative, has none. I mean that's\Napparently not in scope. And what I
Dialogue: 0,0:19:34.67,0:19:46.56,Default,,0000,0000,0000,,propose for the LibreSilicon compiler is\Nthe map and reduce approach. And as I've
Dialogue: 0,0:19:46.56,0:19:52.13,Default,,0000,0000,0000,,mentioned you get explicit subcell\Nhierarchies through high modularization.
Dialogue: 0,0:19:52.13,0:19:56.62,Default,,0000,0000,0000,,That is done by the developers and\Nyou also get implicit subcell hierarchies
Dialogue: 0,0:19:56.62,0:20:05.86,Default,,0000,0000,0000,,by compression-like algorithms that exline\Nas opposed to inline the registers or one
Dialogue: 0,0:20:05.86,0:20:13.90,Default,,0000,0000,0000,,bit adders. And this is also about\Npreserving these newfound hierarchies in
Dialogue: 0,0:20:13.90,0:20:20.10,Default,,0000,0000,0000,,the compiler interfaces so you don't end\Nup inlining them again because this is
Dialogue: 0,0:20:20.10,0:20:24.64,Default,,0000,0000,0000,,not a Von Neumann architecture where it\Nwould make sense to inline a lot of code.
Dialogue: 0,0:20:24.64,0:20:30.64,Default,,0000,0000,0000,,So the code runs on the stack and the\Nlevel 1 cache. This is about reusing
Dialogue: 0,0:20:30.64,0:20:42.23,Default,,0000,0000,0000,,components. Okay. So this is a part of the\Nrocket ship, the system bus is one
Dialogue: 0,0:20:42.23,0:20:50.20,Default,,0000,0000,0000,,component of a very modular chip rocket\Nship. And as you can see it is composed of
Dialogue: 0,0:20:50.20,0:20:56.98,Default,,0000,0000,0000,,several simple lazy modules and those\Nsimple modules are again composed of other
Dialogue: 0,0:20:56.98,0:21:01.53,Default,,0000,0000,0000,,components. And then you have a lot of\Nqueues and this number on the left says
Dialogue: 0,0:21:01.53,0:21:08.04,Default,,0000,0000,0000,,how many times it's been used. For example\Nqueue 15 is used 5 times in the
Dialogue: 0,0:21:08.04,0:21:16.40,Default,,0000,0000,0000,,AXI4Deinterleaver and this is only the\Nexplicit hierarchy that is declared by the
Dialogue: 0,0:21:16.40,0:21:23.73,Default,,0000,0000,0000,,developer. Okay. Now when you apply some\Ncompression-like algorithms you can
Dialogue: 0,0:21:23.73,0:21:32.09,Default,,0000,0000,0000,,actually gain, you can get more leaves so\Nyou can be even more modular. For example
Dialogue: 0,0:21:32.09,0:21:39.55,Default,,0000,0000,0000,,queue 1 is composed of several implicit\Nmodules and you can see one queue is even
Dialogue: 0,0:21:39.55,0:21:46.67,Default,,0000,0000,0000,,reused seven times. So you just route,\Nplace and route these green leaves like
Dialogue: 0,0:21:46.67,0:21:51.76,Default,,0000,0000,0000,,once and then you can reuse it in the\Nqueue 1 and everywhere where queue 1 is
Dialogue: 0,0:21:51.76,0:22:02.30,Default,,0000,0000,0000,,reused some at some other point in the\Nchip. Now I want to state a very simple
Dialogue: 0,0:22:02.30,0:22:10.27,Default,,0000,0000,0000,,optimization problem. What we need for\Nthe process is to have components and
Dialogue: 0,0:22:10.27,0:22:16.18,Default,,0000,0000,0000,,wires that connect the components or nets\Nand these nets and components are actually
Dialogue: 0,0:22:16.18,0:22:24.20,Default,,0000,0000,0000,,rectilinear geometries, the components\Nshall not overlap and the nets shall
Dialogue: 0,0:22:24.20,0:22:32.01,Default,,0000,0000,0000,,overlap with the respective pins they are\Nsupposed to connect. The minimizing goals
Dialogue: 0,0:22:32.01,0:22:36.47,Default,,0000,0000,0000,,of this optimization problem is layout\Narea, which is the most critical one
Dialogue: 0,0:22:36.47,0:22:43.06,Default,,0000,0000,0000,,because this is what maximizes yield, the\Nmaximum wire length because it's about
Dialogue: 0,0:22:43.06,0:22:49.75,Default,,0000,0000,0000,,resistance, the wire count you want to\Nkeep very small but you want to allow for
Dialogue: 0,0:22:49.75,0:22:56.80,Default,,0000,0000,0000,,wires. The crossing number is a\Ncomputational thing. It doesn't really
Dialogue: 0,0:22:56.80,0:23:01.46,Default,,0000,0000,0000,,matter for the implementation on the\Nsilicon and you also want maybe you want
Dialogue: 0,0:23:01.46,0:23:11.85,Default,,0000,0000,0000,,to minimize the wire jogs which is bends\Nin the wire. So to to solve optimization
Dialogue: 0,0:23:11.85,0:23:19.31,Default,,0000,0000,0000,,problems in 2018 maybe you want to use an\Nabstraction from the SAT solvers. You used
Dialogue: 0,0:23:19.31,0:23:25.78,Default,,0000,0000,0000,,to know academia came up with some pretty\Nneat theory is called satisfiability
Dialogue: 0,0:23:25.78,0:23:35.22,Default,,0000,0000,0000,,modulo theories and you can just put some\Nfirst order logic and give it to a solver.
Dialogue: 0,0:23:35.22,0:23:41.37,Default,,0000,0000,0000,,I've listed a few. For example ABC is used\Nby Yosys and Z3 from Microsoft, also very
Dialogue: 0,0:23:41.37,0:23:46.78,Default,,0000,0000,0000,,promising product, but you can obviously\Nchoose from many products by academia and
Dialogue: 0,0:23:46.78,0:23:54.56,Default,,0000,0000,0000,,industry. Just a quick reminder what\Nboolean satisfiability is: find
Dialogue: 0,0:23:54.56,0:24:00.25,Default,,0000,0000,0000,,assignments for all these six variables\Nwhich are boolean so that the whole term
Dialogue: 0,0:24:00.25,0:24:06.65,Default,,0000,0000,0000,,is true. And now with SMT or\Nsatisfiability modulo theories you can do
Dialogue: 0,0:24:06.65,0:24:13.77,Default,,0000,0000,0000,,the same thing but now with integers and\Nalso more complex data types but integers
Dialogue: 0,0:24:13.77,0:24:22.95,Default,,0000,0000,0000,,are the most interesting. So let's do\Nsomething with SMT. For example we have a
Dialogue: 0,0:24:22.95,0:24:29.28,Default,,0000,0000,0000,,component that is rectangular. And now you\Ncan see this is like a Cartesian
Dialogue: 0,0:24:29.28,0:24:35.26,Default,,0000,0000,0000,,coordinate system and you have the left\Nbottom point which is x and y and then you
Dialogue: 0,0:24:35.26,0:24:41.32,Default,,0000,0000,0000,,have the right and the top point. And now\Nif you for example have this problem that
Dialogue: 0,0:24:41.32,0:24:47.07,Default,,0000,0000,0000,,you don't want to have overlapping\Nrectangles you can have a rectangle A and
Dialogue: 0,0:24:47.07,0:24:57.47,Default,,0000,0000,0000,,rectangle B and declare these coordinates\Nand then have some proposition that shall
Dialogue: 0,0:24:57.47,0:25:04.29,Default,,0000,0000,0000,,be true and to have a proposition that\Nsays they shall not overlap is to say
Dialogue: 0,0:25:04.29,0:25:10.34,Default,,0000,0000,0000,,this. I mean it's actually the lower half\Nthat makes sure that they don't overlap
Dialogue: 0,0:25:10.34,0:25:15.20,Default,,0000,0000,0000,,and the upper half makes sure that the\Ncomponents actually have the right
Dialogue: 0,0:25:15.20,0:25:19.86,Default,,0000,0000,0000,,dimensions. Well in this example they\Nobviously have the same dimensions the
Dialogue: 0,0:25:19.86,0:25:26.36,Default,,0000,0000,0000,,same components. And so you make sure\Nthat the left point of the second
Dialogue: 0,0:25:26.36,0:25:44.37,Default,,0000,0000,0000,,rectangle is right of the... Okay no,\Nnever mind. One last important point I
Dialogue: 0,0:25:44.37,0:25:50.37,Default,,0000,0000,0000,,want to make is that this this framework\Nwe want to create, it's not based on the
Dialogue: 0,0:25:50.37,0:25:57.76,Default,,0000,0000,0000,,inheritance model that we've seen in the\Nprocess steps right now. But we want to
Dialogue: 0,0:25:57.76,0:26:02.17,Default,,0000,0000,0000,,combine the problems. For example the\Noverlapping problem, the pin connect
Dialogue: 0,0:26:02.17,0:26:05.36,Default,,0000,0000,0000,,problem, and then arbitrary constraints\Nthat come up during the process
Dialogue: 0,0:26:05.36,0:26:10.33,Default,,0000,0000,0000,,development that Dave and Hagen will\Nsupply me with and I will formulate that
Dialogue: 0,0:26:10.33,0:26:15.39,Default,,0000,0000,0000,,in first order logic. And then this\Nmakes sure it's formally correct and it
Dialogue: 0,0:26:15.39,0:26:24.15,Default,,0000,0000,0000,,doesn't blow up. And as you can tell I\Nmean I've combined many NP-hard
Dialogue: 0,0:26:24.15,0:26:29.48,Default,,0000,0000,0000,,problems at the same time but I think we\Ncan manage that if we have very small
Dialogue: 0,0:26:29.48,0:26:37.42,Default,,0000,0000,0000,,cells so I'd suggest we just stay here and\Ndon't do all this for very large chips but
Dialogue: 0,0:26:37.42,0:26:45.84,Default,,0000,0000,0000,,reuse small chips and then reuse the small\Nchips in other small chips. The silicon
Dialogue: 0,0:26:45.84,0:26:54.50,Default,,0000,0000,0000,,compiler is one half of maximizing\Nyields. And the other half is to get the
Dialogue: 0,0:26:54.50,0:27:03.26,Default,,0000,0000,0000,,process right so to get the process right,\Nwe have David and Victor. So please.
Dialogue: 0,0:27:03.26,0:27:14.03,Default,,0000,0000,0000,,David: So thanks for the handover. So very\Nfirst. There's a lot of questions why Hong
Dialogue: 0,0:27:14.03,0:27:19.54,Default,,0000,0000,0000,,Kong. So one thing why this is a\Nreally suitable place to do that is
Dialogue: 0,0:27:19.54,0:27:27.49,Default,,0000,0000,0000,,because of history like the epic Commodore\N64 has been made in Hong Kong. Then the
Dialogue: 0,0:27:27.49,0:27:32.60,Default,,0000,0000,0000,,chips in the first Macintosh have been\Nmade in Hong Kong and all of these
Dialogue: 0,0:27:32.60,0:27:42.55,Default,,0000,0000,0000,,manufacturing lines. Some of them at least\None is still available. So also there is a
Dialogue: 0,0:27:42.55,0:27:51.25,Default,,0000,0000,0000,,very advanced laboratory. That's the NFF,\NNano Fabrication Facility in
Dialogue: 0,0:27:51.25,0:27:59.31,Default,,0000,0000,0000,,Clearwater Bay and they let us kindly use\Ntheir equipment to develop this process.
Dialogue: 0,0:27:59.31,0:28:07.14,Default,,0000,0000,0000,,Also one of the sectors I mentioned\Nbefore, RCL semiconductors, they're really
Dialogue: 0,0:28:07.14,0:28:12.27,Default,,0000,0000,0000,,open to introduce LibreSilicon in their\Nmass-manufacturing lines: one in Shenzen,
Dialogue: 0,0:28:12.27,0:28:28.47,Default,,0000,0000,0000,,one in Tai Po. So in conclusion of that we\Nhave advanced R&D labs there. There is
Dialogue: 0,0:28:28.47,0:28:35.77,Default,,0000,0000,0000,,factories available. We can easily export\Nit to here over channels which already
Dialogue: 0,0:28:35.77,0:28:43.84,Default,,0000,0000,0000,,exist. Right. And also in general it's\Njust more relaxed over there. And I don't
Dialogue: 0,0:28:43.84,0:28:59.18,Default,,0000,0000,0000,,like minus degrees. So our process is a\Nlittle bit of a monster. So it makes sense
Dialogue: 0,0:28:59.18,0:29:05.46,Default,,0000,0000,0000,,to tackle that one by one so we are right\Nnow feeling ourselves upwards to get the
Dialogue: 0,0:29:05.46,0:29:14.00,Default,,0000,0000,0000,,standard CMOS debugged, final with\Noptimized frequencies there. But we
Dialogue: 0,0:29:14.00,0:29:19.21,Default,,0000,0000,0000,,already have on the Pearl River, I've shown\Nyou, we already have test structures for
Dialogue: 0,0:29:19.21,0:29:27.44,Default,,0000,0000,0000,,high voltage MOSFETS, B junction\Ntransistors, Zener diodes, even flash,
Dialogue: 0,0:29:27.44,0:29:35.01,Default,,0000,0000,0000,,resistors, and caps. So it's only a\Nquestion of effort I guess in the next few
Dialogue: 0,0:29:35.01,0:29:45.62,Default,,0000,0000,0000,,months to get that working. When we\Ndesigned the process like, how it usually
Dialogue: 0,0:29:45.62,0:29:50.75,Default,,0000,0000,0000,,works when you make a process, you look at\Nthe machines you have availlable, what can
Dialogue: 0,0:29:50.75,0:29:57.09,Default,,0000,0000,0000,,these machines do, optimum operation range\Nand then you look what substrate, what
Dialogue: 0,0:29:57.09,0:30:01.22,Default,,0000,0000,0000,,material you have available and then you\Nstart tinkering you own little proprietary
Dialogue: 0,0:30:01.22,0:30:08.73,Default,,0000,0000,0000,,process. That's how fabs do that. And we\Nsaid, OK, well, to the point where we look
Dialogue: 0,0:30:08.73,0:30:15.76,Default,,0000,0000,0000,,at the machines - what can they do? We\Ndo the same, but afterwards we look that
Dialogue: 0,0:30:15.76,0:30:23.95,Default,,0000,0000,0000,,it's portable. Not specific to the\Nequipment. So just because we have certain
Dialogue: 0,0:30:23.95,0:30:29.61,Default,,0000,0000,0000,,machines which can do awesome things, but\Nare really exotic, doesn't mean we have to
Dialogue: 0,0:30:29.61,0:30:37.69,Default,,0000,0000,0000,,use them. So we avoid exalting machines so\Nthat it's as portable as possible. And we
Dialogue: 0,0:30:37.69,0:30:43.18,Default,,0000,0000,0000,,also try to use wet etching whenever\Npossible in order to make sure that you
Dialogue: 0,0:30:43.18,0:30:55.11,Default,,0000,0000,0000,,even can build it in a basement. And here\NEvan Heisenberg may be interested now in,
Dialogue: 0,0:30:55.11,0:31:02.61,Default,,0000,0000,0000,,you know, changing business into a less\Ndangerous business. And, yeah, they can't
Dialogue: 0,0:31:02.61,0:31:06.99,Default,,0000,0000,0000,,be leading the innovation hub Hamburg I've\Nseen, like this improvised clean room with
Dialogue: 0,0:31:06.99,0:31:15.92,Default,,0000,0000,0000,,just a diffusion furnace. So, that's a\Ncross-section of the... it's not
Dialogue: 0,0:31:15.92,0:31:21.54,Default,,0000,0000,0000,,finalised, but you see a cross section\Ntheoretical that's... by the way, you can
Dialogue: 0,0:31:21.54,0:31:28.71,Default,,0000,0000,0000,,find it on GitHub as well. It's all in the\Npublications, everything we develop, all
Dialogue: 0,0:31:28.71,0:31:37.83,Default,,0000,0000,0000,,the measurement data, all this on GitHub.\NSo that's actually the layout of these
Dialogue: 0,0:31:37.83,0:31:48.26,Default,,0000,0000,0000,,little squares here on the wafer. You\Nsee the apple in the middle. It's just in
Dialogue: 0,0:31:48.26,0:31:55.93,Default,,0000,0000,0000,,this year. That's, uh, it's nice. I have a\NPython script in the GDS2 generator
Dialogue: 0,0:31:55.93,0:32:01.29,Default,,0000,0000,0000,,tool folder for Python and you\Ncan take any png or anything and just
Dialogue: 0,0:32:01.29,0:32:06.75,Default,,0000,0000,0000,,convert it into layout format, so you can\Nput your own pictures onto the metal free
Dialogue: 0,0:32:06.75,0:32:14.77,Default,,0000,0000,0000,,layer. So in case you already have\Ninterest into making little trips also.
Dialogue: 0,0:32:14.77,0:32:20.57,Default,,0000,0000,0000,,It's also possible to make, like, ear\Nrings also with ... We don't care as long
Dialogue: 0,0:32:20.57,0:32:26.58,Default,,0000,0000,0000,,as there are 4 more millimeters on the\Nsilicon. You can put pictures on the
Dialogue: 0,0:32:26.58,0:32:36.67,Default,,0000,0000,0000,,silicon. So that was the Pearl River\Nright. And the Pearl River fulfills the
Dialogue: 0,0:32:36.67,0:32:44.62,Default,,0000,0000,0000,,function for us at the moment to debug all\Nthe features of this LibreSilicon process.
Dialogue: 0,0:32:44.62,0:32:50.65,Default,,0000,0000,0000,,Then the next thing we have to use it to\Ncalibrate new foundries so now, we
Dialogue: 0,0:32:50.65,0:32:56.25,Default,,0000,0000,0000,,developed it at the NFF in Clearwater Bay\Nright. And afterwards we go over to HQ
Dialogue: 0,0:32:56.25,0:33:03.13,Default,,0000,0000,0000,,with, to the RCL guys in Tai Po, and they\Nhave the machines and then we have to pipe
Dialogue: 0,0:33:03.13,0:33:08.64,Default,,0000,0000,0000,,the Pearl River layout through there as\Nwell and repeat that process over and over
Dialogue: 0,0:33:08.64,0:33:15.41,Default,,0000,0000,0000,,again until the measurement data, like\Nthe frequent, the you know the Beta
Dialogue: 0,0:33:15.41,0:33:21.86,Default,,0000,0000,0000,,depending on Omega of the transistors and\Nthe resistance of the wires and everything
Dialogue: 0,0:33:21.86,0:33:28.34,Default,,0000,0000,0000,,kind of is the same as at NFF so that you\Ncan basically, as I mentioned before one
Dialogue: 0,0:33:28.34,0:33:32.87,Default,,0000,0000,0000,,of the design concerns is portability\Nthat you can basically prototype a chip
Dialogue: 0,0:33:32.87,0:33:39.86,Default,,0000,0000,0000,,at the NFF and then produce it in RCL or\Nin maybe some other fab in Shenzhen or
Dialogue: 0,0:33:39.86,0:33:48.84,Default,,0000,0000,0000,,whatever. And so and if there are new\Nfeatures coming out which also make a new
Dialogue: 0,0:33:48.84,0:33:59.99,Default,,0000,0000,0000,,release of the Pearl River test waver and\Nwe give that around they push it to GitHub
Dialogue: 0,0:33:59.99,0:34:09.05,Default,,0000,0000,0000,,and people can introduce and calibrate the\Nprocess to support the new feature. And so
Dialogue: 0,0:34:09.05,0:34:13.16,Default,,0000,0000,0000,,that's how does that work. So usually,\Ntypically you have something like a photo
Dialogue: 0,0:34:13.16,0:34:19.81,Default,,0000,0000,0000,,mask like here. I didn't bring that one\Nbecause it's in a clean room there and the
Dialogue: 0,0:34:19.81,0:34:26.82,Default,,0000,0000,0000,,dust might scratch my micro structures on\Nthere. So also afterwards I have to clean
Dialogue: 0,0:34:26.82,0:34:31.57,Default,,0000,0000,0000,,it for half an hour and when I come back\Nto Hong Kong from here I'm so jetlagged I
Dialogue: 0,0:34:31.57,0:34:35.49,Default,,0000,0000,0000,,just want to get started again, not wait\Nfor the mask.
Dialogue: 0,0:34:35.49,0:34:41.22,Default,,0000,0000,0000,,But there's a picture.\NAnd these masks,
Dialogue: 0,0:34:41.22,0:34:49.36,Default,,0000,0000,0000,,usually a stepper/aligner specific. If you\Ndon't have a stepper then you need to make
Dialogue: 0,0:34:49.36,0:34:56.23,Default,,0000,0000,0000,,a direct transfer that means you actually\Nhave to put the chips in the size you
Dialogue: 0,0:34:56.23,0:35:00.46,Default,,0000,0000,0000,,want to expose them directly onto the\Nmask. Then press the mask onto the
Dialogue: 0,0:35:00.46,0:35:05.51,Default,,0000,0000,0000,,photoresist, expose and develop. That's\Nmessy because you have to clean the mask
Dialogue: 0,0:35:05.51,0:35:10.50,Default,,0000,0000,0000,,all the time. And it really depends. So\Nactually you can do exposure even without
Dialogue: 0,0:35:10.50,0:35:15.03,Default,,0000,0000,0000,,a stepper. So we actually really could do\Nit also there in this university lab in
Dialogue: 0,0:35:15.03,0:35:24.44,Default,,0000,0000,0000,,Hamburg. So all you need is a new UV\Nlight. {\i1}laugs{\i0} So we have a little bit more
Dialogue: 0,0:35:24.44,0:35:33.02,Default,,0000,0000,0000,,advanced tech in Hong Kong. So we have\Nhere an SVG coater, this baby dispenses
Dialogue: 0,0:35:33.02,0:35:40.63,Default,,0000,0000,0000,,automatically HPR 504, a resist. So we\Nactually just have to put in the left, you
Dialogue: 0,0:35:40.63,0:35:45.59,Default,,0000,0000,0000,,see the cassette slot. So you put there\Nlike twenty five wavers or so and then you
Dialogue: 0,0:35:45.59,0:35:51.39,Default,,0000,0000,0000,,have a receive slot and put another\Ncassette there and it just starts sucking
Dialogue: 0,0:35:51.39,0:36:01.64,Default,,0000,0000,0000,,in the wafers one by one, puts primer on\Nit, soft bakes it, and easy. Then you
Dialogue: 0,0:36:01.64,0:36:09.86,Default,,0000,0000,0000,,expose it, develop it, hard bake it,\Nchilled. We have two types of resist actually
Dialogue: 0,0:36:09.86,0:36:19.04,Default,,0000,0000,0000,,and the 6400L for the implantation\Nunfortunately has to be put in manually.
Dialogue: 0,0:36:19.04,0:36:24.12,Default,,0000,0000,0000,,So it comes and it gives you 10 seconds\Nto open the chamber and put the resist on
Dialogue: 0,0:36:24.12,0:36:31.47,Default,,0000,0000,0000,,it. In both cases however it doesn't\Nreally matter so much because the
Dialogue: 0,0:36:31.47,0:36:37.78,Default,,0000,0000,0000,,thickness of the resist is depending on\Nthe RPMs of the spin coating unit. So you
Dialogue: 0,0:36:37.78,0:36:45.27,Default,,0000,0000,0000,,just have to kind of put two thirds of the\Nwaver should be somehow covered with the
Dialogue: 0,0:36:45.27,0:36:54.19,Default,,0000,0000,0000,,resist and the excess resist goes away.\NBut you have to control the RPMs because
Dialogue: 0,0:36:54.19,0:37:03.22,Default,,0000,0000,0000,,depending on when you do wet etching for\Ninstance and HPR 504 has to be enough
Dialogue: 0,0:37:03.22,0:37:11.06,Default,,0000,0000,0000,,thick because of selectivity, so that you\Ndon't etch and consume the polymer,
Dialogue: 0,0:37:11.06,0:37:14.76,Default,,0000,0000,0000,,the resist. So you have to make it thick enough\Nthat you don't have,
Dialogue: 0,0:37:14.76,0:37:17.59,Default,,0000,0000,0000,,you haven't consumed all the polymer before
Dialogue: 0,0:37:17.59,0:37:23.74,Default,,0000,0000,0000,,you have etched your structures. And the\Nsame goes for the implantation because you
Dialogue: 0,0:37:23.74,0:37:41.71,Default,,0000,0000,0000,,need 6400L, this one can sustain higher\Ntemperatures so you can use an implanter.
Dialogue: 0,0:37:41.71,0:37:48.95,Default,,0000,0000,0000,,Now afterwards after exposure development\Nit looks like that. That's an alignment
Dialogue: 0,0:37:48.95,0:37:57.08,Default,,0000,0000,0000,,cross for our optical stepper and for\Ninstance that's our ring oscillator. So
Dialogue: 0,0:37:57.08,0:38:07.02,Default,,0000,0000,0000,,it's one of the structures on our Pearl\NRiver actually. So N well, P well. I have
Dialogue: 0,0:38:07.02,0:38:11.50,Default,,0000,0000,0000,,to hurry up, only 10 minutes or so. So\Nthat's a picture of the developing we have
Dialogue: 0,0:38:11.50,0:38:16.27,Default,,0000,0000,0000,,some P well mask developed so we have\Neverywhere resist except in this little
Dialogue: 0,0:38:16.27,0:38:22.74,Default,,0000,0000,0000,,crosses and stripes there. That's there\Nbelow is the silicon where we implant. The
Dialogue: 0,0:38:22.74,0:38:32.79,Default,,0000,0000,0000,,recipe is easy, first coat, expose the\Nimplant and then resist strip. Same for
Dialogue: 0,0:38:32.79,0:38:41.48,Default,,0000,0000,0000,,the P well and after the resist strip you\Ncan put it into a diffusion furnace in
Dialogue: 0,0:38:41.48,0:38:48.81,Default,,0000,0000,0000,,the atmosphere for like four hours. So\Nwhere does the four hours come from? So
Dialogue: 0,0:38:48.81,0:38:54.19,Default,,0000,0000,0000,,we have the Fick's equation. And the\NFick's equation is essentially in a
Dialogue: 0,0:38:54.19,0:39:00.76,Default,,0000,0000,0000,,similar shape like the laplace heat\Nconduction equation, so to solve, there
Dialogue: 0,0:39:00.76,0:39:07.08,Default,,0000,0000,0000,,are already nice solutions for it. So for\Ninstance if you use boron or phosphorus
Dialogue: 0,0:39:07.08,0:39:13.20,Default,,0000,0000,0000,,which has the nice property that they have\Nthe same constants for this Dₑ. So if you
Dialogue: 0,0:39:13.20,0:39:18.86,Default,,0000,0000,0000,,have the same temperature you basically\Nhave the same Dₑ for phosphorus and boron
Dialogue: 0,0:39:18.86,0:39:23.77,Default,,0000,0000,0000,,so you can implant them next to each\Nother and then put them at once into the
Dialogue: 0,0:39:23.77,0:39:29.69,Default,,0000,0000,0000,,diffusion furnace and the wells are the\Nsame depth. So that's why these two
Dialogue: 0,0:39:29.69,0:39:36.63,Default,,0000,0000,0000,,materials are usually used for diffusion.\NSo that's one of the solutions that you
Dialogue: 0,0:39:36.63,0:39:44.67,Default,,0000,0000,0000,,get, the surface for doping for the\Nthreshold equation which I also will rush
Dialogue: 0,0:39:44.67,0:39:53.15,Default,,0000,0000,0000,,through in a moment as well. The\Nequations you see here with background
Dialogue: 0,0:39:53.15,0:40:02.08,Default,,0000,0000,0000,,doping it's a little bit much. As you have\Nhere this natural logarithm inside. But
Dialogue: 0,0:40:02.08,0:40:07.54,Default,,0000,0000,0000,,besides that you see this jump and that's\Nhow you essentially build a well, you have
Dialogue: 0,0:40:07.54,0:40:13.61,Default,,0000,0000,0000,,the background doping and you compensate\Nthe donors and acceptors with each other
Dialogue: 0,0:40:13.61,0:40:22.36,Default,,0000,0000,0000,,so that's what this absolute value of the\Ndifference means. So the threshold
Dialogue: 0,0:40:22.36,0:40:27.79,Default,,0000,0000,0000,,equation is pretty easy. And like\Nbasically mirrored for PMOS and NMOS that
Dialogue: 0,0:40:27.79,0:40:33.04,Default,,0000,0000,0000,,just like mirrored in the sense that one\Nof the transistors as PMOS is built on a N
Dialogue: 0,0:40:33.04,0:40:47.07,Default,,0000,0000,0000,,well and NMOS is built on a P well. Right.\NAnd what essentially controls the
Dialogue: 0,0:40:47.07,0:40:50.93,Default,,0000,0000,0000,,threshold voltage, so the operational\Nvoltage, which usually in the standard
Dialogue: 0,0:40:50.93,0:40:59.40,Default,,0000,0000,0000,,CMOS is around 0.8 respectively minus\N0.8. That's doping here like the donars
Dialogue: 0,0:40:59.40,0:41:07.71,Default,,0000,0000,0000,,respectively acceptors and the q as\Nusually that's the oxide charge. This is
Dialogue: 0,0:41:07.71,0:41:16.07,Default,,0000,0000,0000,,usually a process specific constant but\Nthat can change. And then you get
Dialogue: 0,0:41:16.07,0:41:21.71,Default,,0000,0000,0000,,flash, it can change Q_SS and then\Nit's flash. That's what you use in SONOS
Dialogue: 0,0:41:21.71,0:41:29.47,Default,,0000,0000,0000,,flash, stands for silicon oxide nitride\Noxide silicon. So there you have a
Dialogue: 0,0:41:29.47,0:41:38.68,Default,,0000,0000,0000,,standard again, NMOS in this case but you\Nhave a sandwich instead of a normal oxide
Dialogue: 0,0:41:38.68,0:41:44.56,Default,,0000,0000,0000,,layer and for the gate oxide you have a\Nnitride and oxide. These oxide layers
Dialogue: 0,0:41:44.56,0:41:53.33,Default,,0000,0000,0000,,above and below the nitrate are called\Ntunnel oxides. And the trick is that with
Dialogue: 0,0:41:53.33,0:41:58.96,Default,,0000,0000,0000,,high enough energy you tunnel electrons\Ninto the, through the oxide into the
Dialogue: 0,0:41:58.96,0:42:04.10,Default,,0000,0000,0000,,nitride where it's trapped and then you\Nshift the operation voltage, the threshold
Dialogue: 0,0:42:04.10,0:42:11.67,Default,,0000,0000,0000,,of the transistor. And when you then put\None at it it doesn't turn on anymore and
Dialogue: 0,0:42:11.67,0:42:18.100,Default,,0000,0000,0000,,that's essentially how the most used flash\Nsolution besides normal floating gate
Dialogue: 0,0:42:18.100,0:42:27.76,Default,,0000,0000,0000,,works. It's really simple. So. And after\Nyou get your wells out of the furnace, so
Dialogue: 0,0:42:27.76,0:42:36.11,Default,,0000,0000,0000,,I did a little detour. You want to make\Nsure that the lateral diodes which got
Dialogue: 0,0:42:36.11,0:42:41.44,Default,,0000,0000,0000,,into existence after diffusion don't\Ncreate unwanted short circuits. So we use
Dialogue: 0,0:42:41.44,0:42:46.55,Default,,0000,0000,0000,,the technology actually developed much\Nlater after one micron already has been
Dialogue: 0,0:42:46.55,0:42:52.56,Default,,0000,0000,0000,,out. It's called STI shallow trench\Nisolation. It's from the ULSI technology
Dialogue: 0,0:42:52.56,0:42:59.02,Default,,0000,0000,0000,,as well as the silicide we use to reduce\Nthe resistance of the polysilicate.
Dialogue: 0,0:42:59.02,0:43:09.32,Default,,0000,0000,0000,,Here are some pictures, we did etch this\None in the lab. That's the islands so that
Dialogue: 0,0:43:09.32,0:43:14.16,Default,,0000,0000,0000,,around everything going down that's the\Ntrenches in between the gates and between
Dialogue: 0,0:43:14.16,0:43:23.50,Default,,0000,0000,0000,,the wells. So we isolate them from each\Nother. So the recipe is pretty easy.
Dialogue: 0,0:43:23.50,0:43:26.73,Default,,0000,0000,0000,,So either you have a plasma\Netcher around or if you're not
Dialogue: 0,0:43:26.73,0:43:31.64,Default,,0000,0000,0000,,rich and don't have money to buy a plasma\Netcher from eBay you can also get this
Dialogue: 0,0:43:31.64,0:43:43.34,Default,,0000,0000,0000,,tetramethylammonium hydroxide. And it's\Nnot even the german name, so cool, and
Dialogue: 0,0:43:43.34,0:43:52.37,Default,,0000,0000,0000,,dilute it with deionized water 3:1 and\Nthis 25% TMAH solution you heat
Dialogue: 0,0:43:52.37,0:43:57.78,Default,,0000,0000,0000,,it up to 80°C, dip your\Nwafer in for six minutes and then you
Dialogue: 0,0:43:57.78,0:44:05.44,Default,,0000,0000,0000,,would get your structures. Metal is\Neasier. So we did here the metal
Dialogue: 0,0:44:05.44,0:44:12.31,Default,,0000,0000,0000,,interconnect for the ring oscillator.\NThey're etching it, also you make a
Dialogue: 0,0:44:12.31,0:44:18.81,Default,,0000,0000,0000,,vacuum, deposit 100 nanometres aluminum,\N30 nanometers titanium for passivation.
Dialogue: 0,0:44:18.81,0:44:23.59,Default,,0000,0000,0000,,Take the vacuum away dip it into HF until\Nyou don't see streaks on the titanium,
Dialogue: 0,0:44:23.59,0:44:28.25,Default,,0000,0000,0000,,then into aluminum etchant until you don't\Nsee streaks from the aluminum. And then
Dialogue: 0,0:44:28.25,0:44:35.59,Default,,0000,0000,0000,,you have your wires. I'll skip\Nthat one. That's just really interconnect.
Dialogue: 0,0:44:35.59,0:44:44.64,Default,,0000,0000,0000,,But I plan to make videos soon where I go\Nthrough the you know like daily video blog
Dialogue: 0,0:44:44.64,0:44:49.54,Default,,0000,0000,0000,,of results but just that you see that you\Nsee the oxide depending on the angle it
Dialogue: 0,0:44:49.54,0:44:57.63,Default,,0000,0000,0000,,has different colors. So that's L2 the\Nisolation. And then you see the
Dialogue: 0,0:44:57.63,0:45:04.02,Default,,0000,0000,0000,,topological measurement device. You see\Nthis one micron because we only deposited
Dialogue: 0,0:45:04.02,0:45:12.71,Default,,0000,0000,0000,,a micron for now. You'll see the heights\Nthe differences and we see that one micron
Dialogue: 0,0:45:12.71,0:45:17.72,Default,,0000,0000,0000,,is not enough. So we'd still have these\Nsharp edges which we don't want. So we have
Dialogue: 0,0:45:17.72,0:45:23.96,Default,,0000,0000,0000,,back in Hong Kong have to deposit another\N2 microns. And if you want a follow up you
Dialogue: 0,0:45:23.96,0:45:31.48,Default,,0000,0000,0000,,go to my Github. OK? So Victor that's him\Nand I have done that so far. It's only
Dialogue: 0,0:45:31.48,0:45:36.70,Default,,0000,0000,0000,,like two weeks because it took a lot of\Ntime to get all the masks manufactured and
Dialogue: 0,0:45:36.70,0:45:41.79,Default,,0000,0000,0000,,so a lot of bureaucracy. We already have\Nthat much and just stay tuned. We already
Dialogue: 0,0:45:41.79,0:45:46.82,Default,,0000,0000,0000,,have figured out so much in the last two\Nweeks that it shouldn't be long before we
Dialogue: 0,0:45:46.82,0:45:57.78,Default,,0000,0000,0000,,can well finish all the features of Pearl\NRiver. Create models with Hawkins popcorn
Dialogue: 0,0:45:57.78,0:46:02.64,Default,,0000,0000,0000,,and start figuring out all the analog\Nstuff for our MCU and then we make
Dialogue: 0,0:46:02.64,0:46:07.22,Default,,0000,0000,0000,,an MCU. That's the first thing we want to\Ndo as soon as we have the features figured
Dialogue: 0,0:46:07.22,0:46:17.41,Default,,0000,0000,0000,,out of Pearl River. If the Goddess is nice\Nto us. Yeah it's a discordia figurine,
Dialogue: 0,0:46:17.41,0:46:23.32,Default,,0000,0000,0000,,it's really cheap on ebay. {\i1}laugs{\i0}\NSo yeah. And that's like an overall
Dialogue: 0,0:46:23.32,0:46:30.70,Default,,0000,0000,0000,,of the features. And we want them build\Nthis microcontroller, and yes because all
Dialogue: 0,0:46:30.70,0:46:34.28,Default,,0000,0000,0000,,the folks don't believe that there are\Npeople who want to buy such items you
Dialogue: 0,0:46:34.28,0:46:45.32,Default,,0000,0000,0000,,please fill out the survey. That one\Nis from Hagens trip, i skipped it but
Dialogue: 0,0:46:45.32,0:46:50.38,Default,,0000,0000,0000,,yeah. So yeah. Thanks. I'm done. And too\Nlate but sorry.
Dialogue: 0,0:46:50.38,0:47:00.90,Default,,0000,0000,0000,,{\i1}applause{\i0}
Dialogue: 0,0:47:00.90,0:47:05.77,Default,,0000,0000,0000,,Herald: Thank you for the talk. No, but if\Nyou wait we have time for questions. So
Dialogue: 0,0:47:05.77,0:47:10.77,Default,,0000,0000,0000,,there are two microphones. One is in the\Nmiddle and one is on the left side of the
Dialogue: 0,0:47:10.77,0:47:16.41,Default,,0000,0000,0000,,stage. Line up and we're going to take\Nsome questions and there is already one
Dialogue: 0,0:47:16.41,0:47:23.27,Default,,0000,0000,0000,,question from Microphone number two.\NMicrophone 2: OK. So thank you for that
Dialogue: 0,0:47:23.27,0:47:28.70,Default,,0000,0000,0000,,interesting talk and all the development\Nthat you're doing. I was wondering have
Dialogue: 0,0:47:28.70,0:47:37.90,Default,,0000,0000,0000,,you had any time to test your transistors\Nyet. And then later on do you plan to
Dialogue: 0,0:47:37.90,0:47:42.85,Default,,0000,0000,0000,,release some sort of analog simulation\Ncapabilities.
Dialogue: 0,0:47:42.85,0:47:48.71,Default,,0000,0000,0000,,David: Yes. Thats the plan for the next\Nfew weeks after I'm back in Hongkong. We
Dialogue: 0,0:47:48.71,0:47:53.33,Default,,0000,0000,0000,,did go back to the cleanroom. We actually\Nwanted to provide already something for the
Dialogue: 0,0:47:53.33,0:48:00.67,Default,,0000,0000,0000,,Congress. Unfortunately we were noticed,\Nshort noticed that Thursday and Friday
Dialogue: 0,0:48:00.67,0:48:06.29,Default,,0000,0000,0000,,they take the wet stations and the\Nmachines offline for maintenance of the
Dialogue: 0,0:48:06.29,0:48:13.14,Default,,0000,0000,0000,,AC. So we have already like, the wafer, we\Nhave the isolation oxides but we didn't
Dialogue: 0,0:48:13.14,0:48:19.12,Default,,0000,0000,0000,,have any time left to actually test the\Nthe you know only having polysilicon is
Dialogue: 0,0:48:19.12,0:48:22.73,Default,,0000,0000,0000,,not enough. You have to also have metal to\Ngo with probes there, that stuff is
Dialogue: 0,0:48:22.73,0:48:27.28,Default,,0000,0000,0000,,micron size.\NHagen: Okay. So your question as I
Dialogue: 0,0:48:27.28,0:48:31.73,Default,,0000,0000,0000,,understand was in the direction of\Nsimulation right? We like to measure all
Dialogue: 0,0:48:31.73,0:48:38.28,Default,,0000,0000,0000,,the structures we have to produce and with\Nthe values we get we like to feed in spice
Dialogue: 0,0:48:38.28,0:48:45.79,Default,,0000,0000,0000,,models. So you can do analog simulations.\NAnd yes we like to use this technology for
Dialogue: 0,0:48:45.79,0:48:50.37,Default,,0000,0000,0000,,analog stuff because as I already\Nmentioned one micron size is enough for
Dialogue: 0,0:48:50.37,0:48:56.28,Default,,0000,0000,0000,,analog. You don't need smaller structures.\NAnalog all this having huge transistor
Dialogue: 0,0:48:56.28,0:49:03.85,Default,,0000,0000,0000,,size from 20 or 50 Microns. So they\Nare huge, you don't need this small
Dialogue: 0,0:49:03.85,0:49:11.35,Default,,0000,0000,0000,,technology. So they are quite feasible for\Nanalog stuff but let's say in this way if
Dialogue: 0,0:49:11.35,0:49:16.15,Default,,0000,0000,0000,,you're doing analog stuff in a\Nconventional way you have to sign all the
Dialogue: 0,0:49:16.15,0:49:21.26,Default,,0000,0000,0000,,NDAs and you're stuck on this technology\Nyou're using. You can't transfer your
Dialogue: 0,0:49:21.26,0:49:27.17,Default,,0000,0000,0000,,design to the next fab because in the next\Nfab the PDKs are different. You have to
Dialogue: 0,0:49:27.17,0:49:31.38,Default,,0000,0000,0000,,transfer or to translate all the\Nstructures there for a rebuild again for
Dialogue: 0,0:49:31.38,0:49:36.25,Default,,0000,0000,0000,,the new technology if you have a\Ntechnology which you can take from one fab
Dialogue: 0,0:49:36.25,0:49:42.72,Default,,0000,0000,0000,,to another like our one. You are quite\Nhappy because the analog stuff you
Dialogue: 0,0:49:42.72,0:49:49.40,Default,,0000,0000,0000,,designed once also fits for the next fab.\NSo yes of course we like to support analog
Dialogue: 0,0:49:49.40,0:49:54.53,Default,,0000,0000,0000,,stuff. We need help for that of course we\Nhave to measure, we are currently
Dialogue: 0,0:49:54.53,0:49:58.15,Default,,0000,0000,0000,,developing the wafer, we are currently\Nworking on the documents how to measure,
Dialogue: 0,0:49:58.15,0:50:02.80,Default,,0000,0000,0000,,what we like to measure and then we have\Nto transfer the values to spice. But we
Dialogue: 0,0:50:02.80,0:50:08.80,Default,,0000,0000,0000,,have documented how we are doing that.\NAnd so everyone can use the knowledge.
Dialogue: 0,0:50:08.80,0:50:12.21,Default,,0000,0000,0000,,Mic 2: Thank you.\NHerald: Thank you. Mike one please.
Dialogue: 0,0:50:12.21,0:50:17.07,Default,,0000,0000,0000,,Mic 1: Do you have any plans for \Nopen source mask production like.
Dialogue: 0,0:50:17.07,0:50:25.92,Default,,0000,0000,0000,,David: Yes. Actually the problem is only\Nthat as I mentioned before. If you want to
Dialogue: 0,0:50:25.92,0:50:30.39,Default,,0000,0000,0000,,have an opto mask for steppers that's\Nalways manufacturer specific. If you want
Dialogue: 0,0:50:30.39,0:50:37.53,Default,,0000,0000,0000,,to have a direct transfer mask not a\Nproblem. So I guess so Sam is really
Dialogue: 0,0:50:37.53,0:50:44.68,Default,,0000,0000,0000,,helpful in the lab. He runs the laser\Nscriber. We could talk with the folks at
Dialogue: 0,0:50:44.68,0:50:51.50,Default,,0000,0000,0000,,NFF. They were really lovely helpful\Nreally. They really like to really help us
Dialogue: 0,0:50:51.50,0:50:58.96,Default,,0000,0000,0000,,a lot. And now that we talk with RCL.\NThey also have laser scribers that we could
Dialogue: 0,0:50:58.96,0:51:04.66,Default,,0000,0000,0000,,actually also start producing masks in the\Nlong run. So yes that's certainly one of
Dialogue: 0,0:51:04.66,0:51:13.15,Default,,0000,0000,0000,,the things I intend to do is providing\Noptical masks for exposure. Um yeah.
Dialogue: 0,0:51:13.15,0:51:17.18,Default,,0000,0000,0000,,Herald: Thank you. Uh one more question\Nfrom microphone two.
Dialogue: 0,0:51:17.18,0:51:25.01,Default,,0000,0000,0000,,Mic 2: Great talk thanks. I'm really\Ninterested in the - what it would take to
Dialogue: 0,0:51:25.01,0:51:31.04,Default,,0000,0000,0000,,build the fab. What's the minimum set\Nof tools. We've already seen a couple of
Dialogue: 0,0:51:31.04,0:51:37.56,Default,,0000,0000,0000,,orders of cost reduction in, through DIY\Nbio hacking by making the tooling a lot
Dialogue: 0,0:51:37.56,0:51:44.30,Default,,0000,0000,0000,,cheaper. Do you see that happening within\Nthe nearest decades and your sort of work?
Dialogue: 0,0:51:44.30,0:51:51.25,Default,,0000,0000,0000,,David: Yes. So for instance I made my\Nprocess by purpose this way that you can
Dialogue: 0,0:51:51.25,0:51:56.64,Default,,0000,0000,0000,,actually improvise most of it like the LTL\Ngrowing and deposition and everything with
Dialogue: 0,0:51:56.64,0:52:02.39,Default,,0000,0000,0000,,a furnace. So what you need is a wet\Netcher like some wet etch station. You can
Dialogue: 0,0:52:02.39,0:52:08.20,Default,,0000,0000,0000,,actually there is a video from Jeri\NEllsworth called "making microchips
Dialogue: 0,0:52:08.20,0:52:16.21,Default,,0000,0000,0000,,at home cooking with Jeri" and he does\Nmicrochips in the kitchen so it's
Dialogue: 0,0:52:16.21,0:52:21.49,Default,,0000,0000,0000,,not, you get scared like HFS, it dissolves\Nyour bones and so on and then you see the
Dialogue: 0,0:52:21.49,0:52:25.39,Default,,0000,0000,0000,,guys who already have qualified, are\Nqualified or employed there: they just
Dialogue: 0,0:52:25.39,0:52:33.74,Default,,0000,0000,0000,,without any PPE, nothing just grab into\Nthe HF. That's just the skill to scare
Dialogue: 0,0:52:33.74,0:52:40.51,Default,,0000,0000,0000,,folks from generating insurance problems.\NIn general it's not really that dangerous
Dialogue: 0,0:52:40.51,0:52:48.07,Default,,0000,0000,0000,,right. You can do the stuff at home. No\Nproblem. Yeah. So we intend. So this
Dialogue: 0,0:52:48.07,0:52:55.100,Default,,0000,0000,0000,,process I made is so trivial. So we have\Nalso a branch called super low tech. We
Dialogue: 0,0:52:55.100,0:53:02.04,Default,,0000,0000,0000,,just shall essentially but it's more RnD.\NBut you could actually help there for
Dialogue: 0,0:53:02.04,0:53:08.15,Default,,0000,0000,0000,,instance figure out the last details,\Nget a furnace from eBay put it onto your
Dialogue: 0,0:53:08.15,0:53:17.41,Default,,0000,0000,0000,,kitchen table start RnD-ing make some git\Npull requests and we're super happy. Okay.
Dialogue: 0,0:53:17.41,0:53:22.11,Default,,0000,0000,0000,,So it's doable and the furnace you get on\Nebay. So no problem.
Dialogue: 0,0:53:22.11,0:53:29.56,Default,,0000,0000,0000,,Herald: Thank you. Microphone 1 again.\NMic 1: So you just said about the
Dialogue: 0,0:53:29.56,0:53:33.66,Default,,0000,0000,0000,,analog stuff that a lot of that is usually\Nunder NDA from the fab. So have you
Dialogue: 0,0:53:33.66,0:53:38.51,Default,,0000,0000,0000,,encountered any problems with the fab and\Nthat you're currently using in that you're
Dialogue: 0,0:53:38.51,0:53:43.79,Default,,0000,0000,0000,,actually trying to discover these\Nprocesses for yourself like you're
Dialogue: 0,0:53:43.79,0:53:48.09,Default,,0000,0000,0000,,generating competition that they might not\Nlike, have you had any problems with that.
Dialogue: 0,0:53:48.09,0:53:54.94,Default,,0000,0000,0000,,David: Oh no I had a nice phone calls,\Ne-mails with the owner of the fab over in
Dialogue: 0,0:53:54.94,0:54:01.96,Default,,0000,0000,0000,,Tai Po who also has a second branch in\NShenzhen that's RCL. I actually asked him
Dialogue: 0,0:54:01.96,0:54:08.11,Default,,0000,0000,0000,,recently "Hey is it okay when I use your\Nlogo in the presentation and implicitly
Dialogue: 0,0:54:08.11,0:54:13.32,Default,,0000,0000,0000,,make an advertisement for your fab here?"\NNo prob go ahead. That is like...
Dialogue: 0,0:54:13.32,0:54:18.58,Default,,0000,0000,0000,,He's really eager to, LibreSilicon\Nis what they need because every fab
Dialogue: 0,0:54:18.58,0:54:24.27,Default,,0000,0000,0000,,usually has to invest money in to develop\Nit. First they develop a proprietary
Dialogue: 0,0:54:24.27,0:54:30.07,Default,,0000,0000,0000,,process right, or they license some\Nproprietary process from another company
Dialogue: 0,0:54:30.07,0:54:38.26,Default,,0000,0000,0000,,and then they have to invest RnD costs to\Ndevelop IP cores for their setup. With
Dialogue: 0,0:54:38.26,0:54:43.92,Default,,0000,0000,0000,,LibreSilicon the problem is solved for\Nthe companies because these foundry is
Dialogue: 0,0:54:43.92,0:54:49.10,Default,,0000,0000,0000,,using LibreSilicon everything the\Ncommunity develops is on github. And
Dialogue: 0,0:54:49.10,0:54:55.69,Default,,0000,0000,0000,,that's the IP catalog essentially.\NSo they don't have to invest any
Dialogue: 0,0:54:55.69,0:55:00.38,Default,,0000,0000,0000,,additional money into RnD-ing IP cores\Nthat's in the nature of open source that
Dialogue: 0,0:55:00.38,0:55:05.80,Default,,0000,0000,0000,,there are IP cores popping into existence\Nall the time. They can focus on the thing
Dialogue: 0,0:55:05.80,0:55:10.94,Default,,0000,0000,0000,,they're best at: making silicon, right? So\Nit's actually positive but only for the
Dialogue: 0,0:55:10.94,0:55:15.58,Default,,0000,0000,0000,,small foundries that are really interested\Nespecially Shenzhen and now some in India
Dialogue: 0,0:55:15.58,0:55:22.42,Default,,0000,0000,0000,,and some of the big foundries and they\Nwill not, they are anyway the big
Dialogue: 0,0:55:22.42,0:55:27.09,Default,,0000,0000,0000,,companies have the tendency to be as\Nmobile as a cargo ship. So it will take at
Dialogue: 0,0:55:27.09,0:55:32.07,Default,,0000,0000,0000,,least like two years until they\Nacknowledge that LibreSilicon exists and
Dialogue: 0,0:55:32.07,0:55:39.87,Default,,0000,0000,0000,,then we might expect some legal you know\Nbullying. But for now they won't even they
Dialogue: 0,0:55:39.87,0:55:46.39,Default,,0000,0000,0000,,just laugh right. They just laugh at best.
Dialogue: 0,0:55:46.39,0:55:49.82,Default,,0000,0000,0000,,Herald: We're going to have two more\Nquestions before we're out of time.
Dialogue: 0,0:55:49.82,0:55:54.46,Default,,0000,0000,0000,,Microphone 2.\NMic 2: Why did you go for the twin well
Dialogue: 0,0:55:54.46,0:55:57.65,Default,,0000,0000,0000,,process as opposed to the simpler single\Nwell?
Dialogue: 0,0:55:57.65,0:56:02.18,Default,,0000,0000,0000,,David: Uhm that's a good point. That's\Nalso something with portability and if you
Dialogue: 0,0:56:02.18,0:56:06.77,Default,,0000,0000,0000,,have different events or different\Nsupplier for substrate it might be that in
Dialogue: 0,0:56:06.77,0:56:13.56,Default,,0000,0000,0000,,n-doped or un-doped substrate. So with\Ntwin well architecture and actually we
Dialogue: 0,0:56:13.56,0:56:18.36,Default,,0000,0000,0000,,have on the n-well we also built p-bases\Nand in these n-bases, so we have actually
Dialogue: 0,0:56:18.36,0:56:27.52,Default,,0000,0000,0000,,like stacked wells in the n-wells and\Np-wells. So actually it's a one two. Um
Dialogue: 0,0:56:27.52,0:56:35.97,Default,,0000,0000,0000,,Pentagon Well I don't know. Um and it's\Njust that you can shift to
Dialogue: 0,0:56:35.97,0:56:42.82,Default,,0000,0000,0000,,the doping of the n- and the p-substrate.\NAccording that you fit LibreSilicon
Dialogue: 0,0:56:42.82,0:56:48.26,Default,,0000,0000,0000,,requirements to still have the physical\Nproperties ensured by LibreSilicon. No
Dialogue: 0,0:56:48.26,0:56:53.01,Default,,0000,0000,0000,,matter whether you get your substrate from\Nsomewhere from Great Britain or from
Dialogue: 0,0:56:53.01,0:57:01.16,Default,,0000,0000,0000,,TaoBao.\NHagen: Okay. The thing is we looked before
Dialogue: 0,0:57:01.16,0:57:09.35,Default,,0000,0000,0000,,at eBay which wafer we can get. Currently\NNFF is supporting us with wafers. But if
Dialogue: 0,0:57:09.35,0:57:15.24,Default,,0000,0000,0000,,you're looking on eBay or Alibaba. What\Nelse. We get different wafers with
Dialogue: 0,0:57:15.24,0:57:18.23,Default,,0000,0000,0000,,different dope agents.\NAnd if you have something with say OK
Dialogue: 0,0:57:18.23,0:57:24.60,Default,,0000,0000,0000,,we're just building an n-well we have to\Nverify or lie on the p-base right, or on
Dialogue: 0,0:57:24.60,0:57:30.53,Default,,0000,0000,0000,,the p-substrate. And to avoid the obstacle\Nthe difficulty is: we're doing twin-wells.
Dialogue: 0,0:57:30.53,0:57:36.05,Default,,0000,0000,0000,,We can just regulate our own dopant inside\Nand we are fine. We don't want to have to
Dialogue: 0,0:57:36.05,0:57:43.23,Default,,0000,0000,0000,,rely on the wafer or substrate itself.\NWhat was the basic point.
Dialogue: 0,0:57:43.23,0:57:46.92,Default,,0000,0000,0000,,Herald: Thank you. And the last question\Nfrom microphone 2.
Dialogue: 0,0:57:46.92,0:57:52.32,Default,,0000,0000,0000,,Mic 2: So once you have your complete die\Nhow about packaging and bonding because
Dialogue: 0,0:57:52.32,0:57:56.64,Default,,0000,0000,0000,,if you want to use it you have to place it\Nsomehow on the PCB.
Dialogue: 0,0:57:56.64,0:58:05.14,Default,,0000,0000,0000,,David: Yes. So um. We have a bonding setup\Nat Tai Po already. That's what still is
Dialogue: 0,0:58:05.14,0:58:10.20,Default,,0000,0000,0000,,being used at the moment in Hong Kong is\Nto bond a packaging. Then we have some
Dialogue: 0,0:58:10.20,0:58:15.40,Default,,0000,0000,0000,,guys in HK SDP with packaging set up they\Nhave and can make nice tape reels and they
Dialogue: 0,0:58:15.40,0:58:21.43,Default,,0000,0000,0000,,have also like uh after packaging tests\Nlike: did the bonding work, is it damaged
Dialogue: 0,0:58:21.43,0:58:26.83,Default,,0000,0000,0000,,by the bonding, and so on. Hagen and I\Nhave figured out some nice bonding pad
Dialogue: 0,0:58:26.83,0:58:32.82,Default,,0000,0000,0000,,design which didn't fit at all anymore\Ninto the talk I already over talk like
Dialogue: 0,0:58:32.82,0:58:42.60,Default,,0000,0000,0000,,that. And but it absorbs the physical\Nstress from bonding. So we think that
Dialogue: 0,0:58:42.60,0:58:48.36,Default,,0000,0000,0000,,it's aluminum covered with titanium so you\Ndon't have to sweat away any oxides right
Dialogue: 0,0:58:48.36,0:58:54.80,Default,,0000,0000,0000,,you have better bonding capability, better\Nbonding properties. So it shouldn't be
Dialogue: 0,0:58:54.80,0:58:59.31,Default,,0000,0000,0000,,such a problem. And we have plenty of\Nbonding and packaging labs which have
Dialogue: 0,0:58:59.31,0:59:04.82,Default,,0000,0000,0000,,already promised to help us. So it's\Nreally like small like to choose which one
Dialogue: 0,0:59:04.82,0:59:09.89,Default,,0000,0000,0000,,we take.\NHagen: Just an annotation if you like a
Dialogue: 0,0:59:09.89,0:59:14.79,Default,,0000,0000,0000,,dedicated package please mail us. Right.\NWe are fixed now on the dual in-line
Dialogue: 0,0:59:14.79,0:59:21.19,Default,,0000,0000,0000,,package. We are thinking about flip chip\NBGA but if you have other package which is
Dialogue: 0,0:59:21.19,0:59:25.83,Default,,0000,0000,0000,,more common for tinkerer or something like\Nthat please mail us.
Dialogue: 0,0:59:25.83,0:59:33.97,Default,,0000,0000,0000,,Herald: Thank you. Thank you for the talk.\NThat was the talk on LibreSilicon,
Dialogue: 0,0:59:33.97,0:59:39.58,Default,,0000,0000,0000,,leviathan, chipforge, Andreas Westerwick\Nand Victor. Thank you. Thank you.
Dialogue: 0,0:59:39.58,0:59:49.55,Default,,0000,0000,0000,,{\i1}applause{\i0}
Dialogue: 0,0:59:49.55,0:59:55.18,Default,,0000,0000,0000,,{\i1}postroll music{\i0}
Dialogue: 0,0:59:55.18,1:00:12.92,Default,,0000,0000,0000,,Subtitles created by c3subtitles.de\Nin the year 2020. Join, and help us!